LOW POWER AREA EFFICIENT ALU WITH LOW POWER FULL ADDER
Authors:
Dr.Nookala Venu, Ankitha Engli , Mrs Sandhya rani , Mithin Kumar Ananthula
Page No: 167-170
Abstract:
In this paper implemented a low Power Area efficient ALU using XNOR logic. The 4bit ALU design. ALU is an Arithmetic and Logic Unit, which performs arithmetic operation like ADD, SUB, PASS THROUGH, TWO'S COMPLEMENT, etc. and logic operation like AND, OR, EXCLUSIVE OR, EXCLUSIVE NOR, etc. Full adder is the basic component for an ALU. By reducing the power of full adder, the ALU power also be reduced. Compared with Gate Diffusion Input Full Adder, 50% power reduced in the XNOR based Full Adder Technique. The simulation is carried out using Microwind DSCH3.
Description:
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Volume & Issue
Volume-11,Special Issue 06, July 2022
Keywords
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