Abstract:

Full adder (FA) circuits are frequently built using hybrid logic techniques. How effectively the XOR-XNOR circuit functions has a significant impact on the hybrid FA's delay, power, and driving characteristics. The 10-T high-speed, low-power XOR-XNOR circuit suggested in this article provides simultaneous full swing outputs and improved delay performance. Its performance is assessed by simulating the recommended circuit using 90-nm CMOS technology in tanner tool. The power delay product (PDP), as compared to the current XOR-XNOR modules, is decreased by at least 7.5 percent in the proposed circuit. The FA designs described in this article make use of readily accessible sum and carry modules and the required XOR-XNOR circuit. The recommended FAs provide returns between 2% to 28.13 percent.

Description:

Hybrid full adder (FA), XOR-XNOR circuit, cascaded full adder (CFA)