Low Power Redundant-Transition-Free TSPC Dual-Edge-Triggering FlipFlop using Single-Transistor-Clocked Buffer
Authors:
G. Rajya Lakshmi, Dr. K. Sudhakar, Mr. T. Chakrapani
Page No: 204-211
Abstract:
In the ongoing GPU/AI era, fip-fop (FF) has become known as one about the processor blocks with the most powerful utilization.
Description:
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Volume & Issue
Volume-12,ISSUE-12
Keywords
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